There hasn’t been a really good server fight since Intel freaked out over the AMD Opteron and that was way too long ago.

Tilera, the many-core general-purpose chip start-up, however, is promising some gladiatorial entertainment for those into blood sports.

It thinks it can kick Intel in the shorts and out of the cloud business with chips that with a little recompiling run the same Linux software as Intel but deliver 10x the performance-per-watt of an Intel Sandy Bridge.

Tilera’s director of cloud computing products and marketing Ihab Bishara says chip makers (read Intel) can’t get away with paltry 15%-20% improvements. They have to make orders-of-magnitude jumps.

Tilera figures it’s two years ahead of any wannabe ARM servers and a year ahead of Intel, which might be able to pull something together with its hydra-headed Larrabee chip, now Intel’s Many Integrated Core (MIC) architecture.

It’s pointing the thing at the Web 2.0 server market that’s growing at the rate of 20% CAGR versus the enterprise server’s measly 9%.

For the last two years Tilera has been in a huddle with what it says are “the world’s leading cloud companies,” names it dare not speak, but which obviously have to be, oh, Facebook, Google and Amazon.

And they have been “co-developing,” no less, the new TILE-Gx 3000 processor family that Tilera unveiled Tuesday.

It’s described as the “ultimate cloud computing processor” and is supposed give the cloud boys exactly what they want, slashing all-important power consumption and footprint 80%.

Each of the Gx 3000’s cores – and the dingus will be available with 36, 64 and 100 cores – consume less than 0.5 watts at 1.5GHz. The widgets are optimized for cloud data centers and are supposed to provide an estimated 50% reduction in total cost of ownership (TCO).

Aside from power consumption, the single biggest issue for cloud companies, Tilera is also meeting their 64-bit and error correction demands so it can hit the sweet spot of high performance and low power.

It says its cloud customers have already placed orders although the first version of the part, the 36-core, won’t sample until the end of July, followed by the 64-core and the company’s first 100-core in Q1 next year.

Tilera says the device is targeting scale-out data centers running throughput-oriented applications including:

• Web applications that need high-throughput processing and low latency.

• Database applications like NoSQL and in-memory databases that require high-memory throughput and storage.

• Data mining applications like Hadoop that rely on high disk throughput and data processing.

• And video transcoding that necessitates throughput processing.

The 36-core TILEGx-3036 is supposed to replace single-socket servers; the 64-core 3064 will replace dual-socket servers; and the 100-core 3100 will replace up to quad-socket servers.

They’re all built on Taiwan Semiconductor’s 40nm process. Each core features a three-issue, 64-bit ALU with an advanced virtual memory system. And each core includes 32 kilobytes (kB) of L1 I-cache, 32kB of L1 D-cache and 256kB L2 cache, with up to 32MB of L3 coherent cache across the device.

Processor utilization is optimized using advanced memory stripping that utilizes up to four integrated 72-bit DDR3 memory controllers supporting up to 1TB total capacity. The Gx 3000 family integrates smart NIC hardware for preprocessing, load balancing and buffer management of incoming traffic.

The widgets support a standard software stack like a Centos-compatible 2.6.36 Linux that supports 2,000-odd standard RPM packages; standard tools like Gcc, g++, gdb, gprof, oprofile, perf event, mudflap and eclipse; standard languages like ANSI C/C++, Java, PHP, Perl and Python; programming frameworks like Erlang, TBB and open MP; and standard management protocols like IPMI 2.0, SNMP, Syslog, Telnet, SSH, TFTP, FTP and SCP.

Tilera derived the Gx 3000 series by stripping out stuff like the networking I/O in the networking-oriented Gx 8000 architecture on which the processors are based.

Tilera’s 3000 samples will be available in the company’s own boxes. Third-party boxes – cloud people reportedly prefer cost-conscious ODM gear – should be available in the fall with production servers by the end of the year. Last time through the production boxes came from Quanta.

Tilera expects to be cash flow positive by the end of the year and wants to IPO by the end of next year, sooner than it said a couple of months ago. It recently raised a $45 million round. Total investment comes to $109 million including strategic investments from Cisco and Samsung.

It calls this “reinventing the PC,” comparing it to the way it put multimedia support in Pentium and freed Centrino from the wall socket. And it’s meant a major overhaul of its roadmap.

Intel’s dreaming of all its OEMs fielding elegant “instant-on” laptops that are anorexically thin, use solid state memory, deliver the Holy Grail of all-day battery life, respond to gestures, voice and touch, drag-and-drop files between devices without resorting to the cloud and carry mainstream or premium prices.

So figure it maybe produces a platform starting at 15 watts that goes up to a repurposed 60 watts for a desktop that doesn’t lose relative performance.

At the same time, it’s going to try to catch its low-power Atom chip up with its mainstream chips so there isn’t this usual yawning uncompetitive gap of years between them.

It will mean double-timing to do it by Intel’s deadline of 2014 and telescoping the redoubtable Moore’s Law but it’s the only way Intel can really play in the smartphone and tablet market up against ARM. (At this point Intel is down to comparing what Atom’s gonna have with what ARM already has and making it sound like parity as if the world’s gonna stand still between times.)

Anyway, it will mean shrinking the sub-10 watt 45nm Bonnell Atom that produced the unpopular Moorestown Atom and the 32nm Saltwell that produced the new Medfield Atom down to a 22nm Silvermont platform in 2013 and then to a 14nm Airmont Atom platform in 2014 that’s a contemporary of whatever Intel calls the descendant of Haswell, its mystery 22nm mainstream “future product” and reportedly a new architecture, as you can see by the new roadmap.

It will also mean using its newfangled 3D Tri-Gate transistor magic to good effect.

Intel expects to have Atoms for dense servers as well.

Chip groupie Nathan Brookwood calls the Atom plan Intel’s “tick, tick, tick cadence,” compressing three process technology transitions into 36 months.

One thing Intel’s definitely not going to do, CEO Paul Otellini told an investor meeting this week, is fab any ARM chips as the press has speculated recently. “We’d be beholden to someone else, beholden to pay royalties to them so it would lower the overall profits. I think we can do better.”

Brookwood couldn’t agree with Otellini more. “Every time Intel has strayed from the x86 path,” he said, “it’s been a mitigated disaster at best and often an unmitigated disaster.”

Just in case, Intel happens to have an ARM license that it inherited from DEC when StrongARM passed through its hand.

Intel expects smartphones using its 32nm Medfield Atom chip, a variation of Saltwell, to hit market early next year, which is at least a quarter later than it’s been saying lately, later still if you’ve really been paying attention. The delay may, in part, be attributable to Nokia shifting allegiances.

It’s also supposed to have 35 design-wins for its new 45nm Oak Trail tablet chip, including Android and MeeGo versions. The dingus is out now and will probably ship in widgets in earnest in the second half.

Despite being perceived as too “hot” for the mobility game, Otellini claimed Intel’s making more margin than the silicon vendors selling chips into the devices because a server is needed to handle the traffic created by every 600 smartphones and every 122 tablets. Storage and networking make it even juicier.

“The money,” he said, “is in the infrastructure.”

Meanwhile, Bloomberg reported hearing from Intel software chief Renee James that Microsoft is making multiple versions of Windows 8, including four for ARM chips, probably depending on fabricator. They won’t run legacy software like the version for Intel chips, as previously reported here. The Intel design will have a Windows 7 mode across all size devices. ARM, on the other hand, will be Balkanized.

Microsoft didn’t fancy the disclosure, labeling it “factually inaccurate and unfortunately misleading.” Hmmm.

Brookwood suspects that an ARM Windows 8 will need more memory than an x86 Windows 8. He also points out that ARM hasn’t officially acknowledged a move to 64 bits, which it needs to keep the game going. Where Intel may have a problem is in uprooting ARM’s vendors relationships. It might have more luck if it lets OEMs customize the widgets like ARM does and manufactures to their specs, Brookwood said. Intel, however, isn’t partial to such customizations. It leads to software fragmentation as it hints with Windows 8 on ARM. Intel reportedly wouldn’t mind being an ARM foundry for Apple. No chance of fragmentation there.

By the way, ARM says it now has a team out sweet-talking virtualization and OS houses about porting to its server efforts.

See http://intelstudios.edgesuite.net/im/2011/pdf/2011_Intel_Investor_Meeting_Otellini.pdf and http://ir.arm.com/phoenix.zhtml?c=197211&p=irol-EventDetails&EventId=3897300.

It said the breakthrough, which basically puts a fin-like second story on the humble transistor, promises power reduction and performance improvement in everything from the smallest handheld to the biggest cloud-based servers.

Intel is going to use the newfangled 3D transistors, dubbed Tri-Gate after the fin’s three current-controlling gates, in making its 22nm Ivy Bridge chip, a Sandy Bridge shrink due out by the end of this year. It will also use them in its tablet- and phone-hopeful Atom chip, presumably giving it something to take up against ARM.

Because of the vertical enhancement Ivy Bridge will mean a 37% performance improvement at lower voltages than Intel’s 32nm planar models and consume less than half the power at the same performance as current Intel chips.

Intel first described the widgetry in 2002. It explained the other day at a demo that the new Tri-Gate transistors represent a fundamental departure from the usual 2D planar transistors and claimed the development will translate into “world-shaping devices” that “advance Moore’s Law into new realms.”

The wiring is so “incredibly thin,” Intel said, that more than six million 22nm Tri-Gate transistors can fit in the period at the end of this sentence.

Tri-Gate transistors should turn out chips that operate at a lower voltage with less leakage, giving developers a choice of transistors for low power or high performance depending on the application.

It’s already got new single-socket 20W 2.2GHz E3-1220L and 45W 2,4 GHz E3-1260L Xeons in production, with a 15W Sandy Bridge promised in the second half that are supposed to scratch the itch ARM may have tickled. There’s also a sub-10W Atom server chip due next year.

Everything coming will be 64-bit, with Intel Virtualization Technology built in and support ECC memory. Needless to say, it will be software-compatible.

Intel figures the micro servers they and their descendents will be based on could take less than a 10% slice of the overall server market in the next four-five years.

Facebook labs director Gio Coglitore, who admits to testing some of the early widgetry – presumably SeaMicro’s Atom servers, say, or Dell or Tyan Xeon jobs – seems to prefer such things to virtualizing more powerful infrastructure and imagines massively deploying micro servers later this year or next as front-end web servers. Losing a micro server has no impact on the user experience, he says, and requires no replacement.

Google, on the other hand, seems to prefer what it calls “brawny cores” to “wimpy cores” for throughput and parallelism whereas the “cost numbers used by wimpy-core evangelists always exclude software development costs.” There’s also the “wimpy” possibility of higher DRAM costs and lower utilization.

Intel first debuted the small, low-power, single-processor micro server concept in 2009 targeting the form factor at very dense installations. Next quarter it expects to have a new Micro Server Evaluation Lab set up where developers can analyze their software.

It is Intel’s biggest acquisition ever by a factor of three.

CEO Paul Otellini said during a conference call Thursday morning that the purchase “transitions Intel from a PC company to a computing company.”

Intel explained that that the acquisition, part of its mobile wireless strategy, will let it combine security software and hardware as billions of still relatively innocent, unprotected devices – and the server and cloud networks that manage them – go online. It also differentiates Intel from its competition.

The move is supposed to put security “on a par with energy-efficient performance and connectivity” as a pillar of its business. Intel’s vision includes TVs, cars, medical devices and ATM machines and it noted that cyber threats are spiraling out of control.

So a “fundamentally new approach” is needed and it promised that hardware-enhanced security would lead to breakthroughs in countering the increasingly sophisticated threats.

The move was immediately seen as a reach for inorganic growth with better margins in a business that’s less bumpy than chips. For instance, PC order trends have sharply deteriorated lately. McAfee does close to $2 billion a year, has seen 20% growth recently and fetched close to an 80% gross margin last year. It only makes about $200 million however.

The deal will cost Intel $48 a share in cash. Net of McAfee’s cash, it will cost Intel about $6.8 billion.

Intel will run McAfee as an independent subsidiary reporting to Intel’s Software and Services Group under Renée James.

The security house has 6,100 people. Intel says it will keep most of them including management. Aside from its antivirus widgetry, McAfee’s wares include end-point and networking products and services and an expanding line of gear targeting mobile devices such as smartphones, a market that’s been eluding Intel.

McAfee claims 200 million users.

McAfee has been frequently cited as acquisition bait but never in association with Intel. Intel said that a quiet partnership with McAfee over the last 18 months persuaded it to make the move and then it found a lot of other projects needed to be secured.

Otellini explained that it’s not a matter of bungling but of integration. He said Intel would still work with other security vendors.

The first combined McAfee-Intel products are due in the first part of 2011. James indicated they would involve Intel’s existing Core chips with Atom to follow. Deeper integration will take a while.

Intel means to keep the McAfee brand and to have it continue to support multiple platforms.

The acquisition is expected to dilute Intel’s GAAP earnings slightly the first year and be flat the second year.

The acquisition, already approved by both boards, will hopefully close by December.

Last year Intel bought the embedded OS Wind River.

It says the widget, the first of a family of Knights, will create HPC platforms running at trillions of calculations a second without sacrificing the benefits of standard x86 processors, a hard-won lesson learned from its Itanium adventure.

It means to create supercomputers that run most of their workloads on Xeon chips but accelerate specific highly parallel applications complements of the MIC architecture.

The anticipated 500 gigaflops systems will be aimed at uses such as exploration, scientific research and financial simulation.

According to none other than DreamWorks Animation CEO Jeffrey Katzenberg speaking at the chatty D8 conference the other day, Intel also has workstation intentions for the thing and the reason he called the thing Larrabee despite the fact that Intel canceled the prospective GPU last week is because the thing is Larrabee redirected.

In the initial 32nm developer prototype version that’s floating around out there Knights is a 32-core Larrabee. The first commercial product will be 22nm 50-core device that derives not only from the canceled Larrabee but also from the research-y ultra-low-power 48-core Single-Chip Cloud Computer that Intel disclosed in December and TeraScale.

Larrabee, as Intel puts it, will “use Moore’s Law to scale to more than 50 processing cores on a single chip.” Each of the cores will reportedly run at 1.2GHz, have 8MB of shared coherent cache and four threads apiece for a total of 128 threads. It’ll also support 1GB-2GB of GDDR5 memory.

The company’s already got design and development kits codenamed Knights Ferry shipping to hand-picked developers, and beginning in the second half it means to start delivering MIC developer tools. The trick is that they will share a lot of in common with Xeon tools as well as common software algorithms and programming techniques. The same languages, compilers and libraries can be used. It eliminates the need for a dual-programming architecture.

Apparently the CERN openlab team was able to migrate a complex C++ parallel benchmark to the MIC software development platform in just a few days. Its CTO Sverre Jarp said that “the familiar hardware programming model allowed us to get the software running much faster than expected.”

Since the dingus is 22nm it can’t go commercial until next year.

They’re calling the thing MeeGo and the Linux Foundation will be hosting the project under Intel’s Imad Sousou and Nokia’s Valtteri Halla.

The widgetry, due out next quarter, will support both Intel’s Atom processor and rival ARM chips – though Nokia doesn’t support Atom – and go up against Google’s x86- and ARM-supporting Chrome OS and everybody else in the game.

It’s anticipated that MeeGo could eventually support other architectures besides Atom and ARM. Apps of course would have to be recompiled to hop from one platform to another.

The idea is to build MeeGo on the Moblin core software platform and so-called reference user experiences, adding the Qt UI toolkit from Maemo.

Using the Qt application development environment and the UI framework apps will be deployed to both MeeGo and other platforms such as Nokia’s other, dominant OS, Symbian.

The apps, expected in Q3, will be marketed through Nokia’s Ovi Store, which is reportedly getting a million downloads a day, and Intel’s new AppUp Center. Nokia means to add billing support and more languages to the Ovi Store.

The pair announced their intentions at the Mobile world Congress in Spain Monday.

There’s a web site set up at http://meego.com/ where it explains that licensing is a work in progress. They mean to be as flexible as possible and discourage use of GPL v3 on any components of the kernel and middleware and permissive BSD-style licenses on MeeGo’s various use-based personalities or “user experience subsystem software.”

In Intel’s case it’s the two-billion-transistor Itanium 9300, a k a Tukwila, the device once known as Tanglewood, only about, oh, say, three years late – the thing has been redefined, renamed, tweaked and diddled so many times it’s hard to tell anymore – figure it’s somewhere between two and four years past due. Anyway, two billion transistors is Intel’s personal best and Tukwila quietly started shipping for revenue last month.

In IBM’s case it’s the Power7, out a couple of months sooner than expected, bound for boxes that Blue can use to ward off a Sun-armed Oracle as well as a redirected Cisco and old rival HP.

Tukwila promises to double the performance of its Montecito predecessor.

IBM, on the other hand, has managed an 8x jump over the Power6, and chip-for-chip is more powerful than Intel’s hard-won widget.

Chip groupie Nathan Brookwood describes Tukwila as the “first major overhaul of Itanium since McKinley in 2001” and says that compared to Sun’s ill-fated Rock chip “it’s better late than never.”

Brookwood also says that IBM isn’t given enough credit for delivering Power upgrades in predictable tick-tock fashion, something it’s been doing since 2001, way before Intel coined the phrase.

The 3.5GHz-4GHz Power7 has eight cores – and four threads per core – four times as many cores and eight times as many threads per core as the 5GHz Power6. Tukwila is only a two-threads-per-core quad replacement for the dual-core Montecito while IBM will be able to replace four Power6 chips with one Power7, which should mean a significant cost savings.

If Intel replaces two Montecitos with one Tukwila, Brookwood says “it’s still just breaking even on cores.” At the same 2:1 ratio IBM would be up four cores.

One thing Power can’t do is run Windows and stuff like SQL Server. Itanium can and since Xeon is inching up on Itanium’s RAS skills because of increasingly common platform ingredients, it’s possible that with this generation some of Itanium’s hangers-on could bolt to the eight-core 16-thread Tukwila-socket-compatible Nehalem EX when it arrives.

Anyway, Tukwila has eight threads per processor complements of enhanced Intel Hyper-Threading; uses QuickPath Interconnect technology, Intel’s version of AMD’s HyperTransport technology so there’s no front-side bus; 30MB of cache; is endowed with Turbo Boost Technology to automatically rev performance when needed and conserve power when it’s not based on workload; and – according to the chip’s press agents – has up to 800% the interconnect bandwidth, 500% the memory bandwidth and 700% the memory capacity using industry-standard DDR3 components than Itanium used to have.

Oh, yes, and there’s second-generation Intel Virtualization Technology in the thing; the Intel 7500 chipset can directly assign I/O devices to virtual machines.

Intel Monday announced two new OEMs – well, one out-of-blue, the other merely confirmed. Supermicro, the channel OEM, whose interest was established, is gonna start selling four-socket Tukwila machines.

The surprise is Inspur, a Chinese company evidently with global ambitions that Intel says the Chinese government picked to deliver Itanium solutions. Itanium is gonna be losing Red Hat support although RHEL 5 is good through 2014. Of course, HP represents 85% of Itanium sales and said it would have Tukwila systems out in 90 days.

Between now and 2014 Intel should conceivably field two more versions of Itanium: Poulson, an already late 32nm, 45nm-skipping shrink of the 65nm Tukwila, due maybe who knows in a couple of years, and Kittson about which next to nothing is known except that it should be socket- and binary-compatible with Tukwila and Poulson.

Poulson, Intel said, will have more parallelism, more cores, more cache, Hyper-Threading improvements and instruction-level enhancements compared to Tukwila.

Until then the Itanium 9300 ranges in price from $946 to $3,838 in quantities of 1,000.

Intel would probably like us to repeat that Itanium managed to claw out a $5 billion-a-year systems business in 2008 that probably dropped to $4 billion last year because of the recession but that its RISC rivals, such as they are, are dropping too, probably from $22 billion in ‘08 to $16 billion.

Now about the Power7 and remember that IBM is still the Unix winner with roughly 40% of the market.

Since Oracle is aiming its Sun boxes directly at Blue, IBM said its new Power 750 Express delivers 71% better price/performance than a Sparc Enterprise T5440 server and 280% better price/performance than Sparc Enterprise M5000 and M4000 servers. It’s also supposed to deliver more than 400% better price/performance than the existing HP Integrity rx7640 or the rx6600 servers.

IBM is gonna put out four new Power systems: the Power 780 and Power 770 each with up to 64 Power7 cores, the latter consuming up to 70% less energy for the same number of cores as the Power 570; the Power 755, a high-performance computing cluster node with 32 Power7 cores optimized for analytic workloads; the Power 750 Express, an Energy Star-qualified business server for the mid-market offering four times the processing capacity of its predecessor; and the Power 550 Express in the same energy envelope at a reported 10x the performance of a comparable HP Integrity rx6600.

The Power 750 is supposed to be three times more energy-efficient than the Sparc Enterprise T5440, Sun’s so-called Coolthreads server.

Naturally, the gismos support the advanced virtualization management capabilities of VMControl, which manages a systems pool of multiple Power servers as one entity, which should cut management costs.

The Power 750 Express and 755 should ship February 19; the 770 and 780 should start going out March 16. Planned availability for Systems Director Editions supporting both Power7 and Power6 models – as well as mainframes and x86 boxes – is March 5.

IBM says it’s “vastly increased” the parallel processing capabilities of Power7 systems optimized for databases and delivered a “leap” in throughput computing optimized for running massive Internet workloads.

It also says it’s “dramatically increased” the parallel processing capabilities of its WebSphere, DB2, InfoSphere Warehouse and Cognos middleware for managing Internet, data, transactions and analytics to support Power7 systems. The software will be able to exploit all 32 threads available in a single eight-core Power7, reportedly resulting in performance gains over Intel’s Nehalem chip.

The Power7’s TurboCore mode, which is optimized for database and other transaction-oriented workloads, runs with four cores active and puts most of the resources from all eight cores on the chip behind just the four active cores giving them more cache memory and memory bandwidth, so the clock speed can be increased, driving per-core performance gains.

IBM says its TurboCore mode can maximize the ROI from software by potentially reducing software costs in half for applications licensed per core, while increasing per-core performance.

When not in TurboCore mode, Power7 processors run in so-called MaxCore mode with up to eight cores per socket and four threads per core – 32 threads total. Power7 has so-called Intelligent Threads that can dynamically vary based on workload demand, increasing capacity and total performance gains.

For workloads that need large amounts of memory, or in virtualized environments where more memory is beneficial, clients can use a new Power7 technology called Active Memory Expansion that uses memory compression technology to make the physical memory on the system look to applications as though it was up to twice as big as it actually is, transparently compressing more data into memory and expanding the memory capacity of Power7 systems.

IBM estimates up to a 65% increase in transactions or users could be handled by the same server previously constrained by memory capacity.

The two dozen far-reaching remedies that the US regulator is demanding in the complaint it lodged Wednesday for Intel’s alleged decade of stifling competition to maintain its monopoly and now extend it to the GPU market are draconian.

Intel wouldn’t be able to offer volume discounts or bundled prices; optimize its widgetry if the optimization disadvantages rivals; have any say over who’s using its IP to produce chips; write licenses without the government guiding its hand; sue competitors’ third-party fabricators to protect its IP; or even restrict licenses in case control of the licensee changes hands.

It even looks like the FTC wants Intel to drop what Intel figures is billions of dollars worth of IP on Nvidia for nothing – like hand it an x86 license along with its interoperability secrets to create a third source. The FTC wants to micromanage Intel’s advertising and promotional materials, riffle through all tests, reports, studies and demonstrations, oversee its mergers and acquisitions, plus any consolidations or combination of assets.

Intel pushed back hard after the Federal Trade Commission sued it Wednesday. Obviously it had to.

Its shiny new general counsel Doug Melamed, a graduate of the Justice Department’s Antitrust Division and the DOJ’s suit against Microsoft, accused the agency of basing its case on “unprecedented legal theories” and demanding “unprecedented remedies.”

The company called the agency’s case “misguided” and said “It is based largely on claims that the FTC added at the last minute and has not investigated. In addition, it is explicitly not based on existing law but is instead intended to make new rules for regulating business conduct. These new rules would harm consumers by reducing innovation and raising prices.”

The director of the FTC’s Bureau of Competition Richard Feinstein begs to differ, but allowed there was a real-time component to the case and said Intel’s $1.25 billion settlement of AMD’s massive antitrust suit a month ago didn’t go far enough.

Intel was kinda sandbagged by the suit. Evidently it lost control of the situation in Washington.

According to the story it tells, it thought it was negotiating a voluntary settlement with the FTC until the regulator suddenly brought a swat of new issues revolving around GPUs, Intel’s CPU compiler and compiler-related benchmarks to the table – some of them just last week – Intel said, complaining that the agency had done no discovery or taken any depositions on these new charges and was simply repeating complaints coming from Nvidia.

According to Melamed the “case could have, and should have, been settled. Settlement talks had progressed very far but stalled when the FTC insisted on unprecedented remedies – including the restrictions on lawful price competition and enforcement of intellectual property rights set forth in the complaint – that would make it impossible for Intel to conduct business.”

He prophesied that “the FTC’s rush to file this case will cost taxpayers tens of millions of dollars to litigate issues that the FTC has not fully investigated. It is the normal practice of antitrust enforcement agencies to investigate the facts before filing suit. The Commission did not do that in this case.”

See http://www.ftc.gov/os/adjpro/d9341/091216intelcmpt.pdf for the FTC’s complaint. The remedies start on page 19 and make quite a read if you can deal with the – ugh – language.

The agency is suing Intel for violating both Section 5 of the FTC Action and Section 2 of the Sherman Antitrust Act.

One of FTC’s commissioners, Thomas Rosch, dissented from the decision to use Section 2 at all on what he called public policy grounds.

He said, “The collateral consequences of including any Section 2 claims are very unfavorable for both Intel and the Commission. Intel currently faces a treble damage suit by the New York Attorney General under Section 2 in the United States District Court in Delaware in addition to a number of Section 2 treble damage class actions that have been filed there. The Commission should not enable those plaintiffs to free ride off of the Commissions work. Nor should it put itself in a position where an unfavorable outcome in those cases may be cited against it.”

The chip, Intel’s first standalone discrete graphics chip and a test of its multi-core prowess, was already late, and hardware and software development had fallen behind schedule.

Intel swears it’s “absolutely committed” to the idea but with a different chip.

Larrabee was based on the x86 architecture to make it easier to program and reportedly could have had as many as 32 cores. Intel never was definite about that.

Embarrassed by its failure, Intel’s decided to say nothing about its next step until it knows exactly what it is and has confidence it’s on track. Mind you, it’s been talking up Larrabee since early 2007.

Meanwhile, to salve its bruised ego, the company points out that the new Arrandale and Clarkdale Core processors due out early next year will integrate graphics into the CPU, but admits it’s not the whiz-bang high-end graphics of the might-have-been Larrabee effort, although Larrabee’s performance supposedly left analysts unimpressed when demoed at IDF in September.

Since the Larrabee had a heartbeat it will be used as a beta or SDK, an Intel spokesman said.

Intel will now have to concede the immediate future to AMD’s Evergreen and Nvidia’s prospective Fermi GPUs and pick a new battleground. AMD’s first Fusion (GPU + CPU) products aren’t expected until 2011.