Tilera stuck its low-power Linux-running 64-core processor to Intel and AMD Tuesday in a head-on challenge to the x86′s infrastructure dominance, particularly in Web 2.0 and cloud accounts, where Tilera’s many-core design is supposed to excel at executing their millions of small parallel tasks simultaneously.
Way better, it says, than the high-power legacy processors with their minimal performance improvements across generations.
Tilera’s system on a chip (SoC) is breaking out of the embedded appliance ghetto where it’s been living and going into the server business with what is supposed to be the most power-efficient and highest compute density system ever, the building blocks for squeezing 10,000 cores into an 8kW rack.
Quanta Computer, the big ODM and a recent investor in Tilera, has built a 2U box codenamed S2Q out of eight Tilera TilePro64 chips reportedly good for up to 1.3 trillion operations a second and costing only 400 Watts to run.
It built the S2Q on spec on its own nickel – an unusual thing for an ODM to do – because those 512 general-purpose cores in that little bitty space are supposed to be able to replace eight 2kW-burning high-end Xeon 5000 class dual-socket servers – and Quanta expects to make a killing on thing once it’s released in limited quantities in September followed by general available in Q4.
It won’t be priced until it starts dribbling out.
Some of the biggest OEMs, the x86′s nearest and dearest, are reportedly going to be buying the widgetry off of Quanta and those that don’t are supposedly developing their own Tilera machines in answer to the cloud’s prayer for rational power budgets and modest space demands without sacrificing performance.
SGI, for one, says it’s going to be peddling a Tilera box. (Tilera chips are rumored to be a variant of the Mips chip once associated with SGI but that’s not true.)
Tilera’s VP of marketing Troy Bailey says that if nothing else vendors are getting no real differentiation out of the legacy chips and they’re “sick of fighting over the last penny.”
Tilera quotes Facebook’s VP of technical operation Jonathan Heiliger saying at GigaOm’s Structure Conference last year that “To build servers for companies like Facebook and Amazon and other people who are operating fairly homogeneous applications, the servers have to be cheap, and they have to be super power-efficient. The latest generations of server processors from Intel and AMD don’t deliver the performance.”
Quanta’s widget was reportedly designed in collaboration with cloud data center providers, end customers and software partners and is targeted at large-scale data centers running high-performance web, database, hosting and finance applications.
Figure markets with highly parallel applications like web serving, in-memory cache, data mining, financial and scientific analytics and government surveillance.
Quanta’s promising to slash users’ TCO and deliver an 80% OPEX savings of over $2.5 million over three year in power they won’t have to pay for to run 1,000 server or $75 million across a whole data center.
Tilera claims to do on a chip what the newly up-from-under-the-radar SeaMicro start-up does on a board.
SeaMicro is aiming for the same space with the same arguments as Tilera and a Xeon-displacing system chockablock with 512 low-power Atom processors, 2,048 CPUs to a standard rack, a design that cuts out 90% of the power-hungry widgetry around the CPU – the switches, terminals servers and load balancing devices in the classic server that are actually responsible for two-thirds of the power it consumes.
Since SeaMicro is supposed to be able to accommodate any processor on its credit card-size motherboards, it’s conceivable it could someday use Tilera’s chips, which are supposed to good for 100 cores on a 40nm process next year and 200 cores on a 28nm process in 2013.
That should make for 20,000 cores to a rack next year and 40,000 cores to a rack by 2013. (Samples of the chips should be circulating by 4Q10 and 2Q11 respectively.)
But first things first. Quanta’s S2Q, which is reportedly undergoing performance tests as we speak, provides up to 16 x 10 GbE interfaces and 16 x 1 Gb interfaces without adding the power or the cost of additional chipsets and networking cards.
It’s got 176 Gbps of I/O bandwidth, up to 64 DIMM slots, and up to 24 front-mounted 2.5-inch hot-plug SAS, SATA or solid state hard drives along with IPMI 2.0 dedicated management ports and dedicated console ports.
Each server node consumes 35W-50W maximum. Its hot-pluggable power supplies are supposed to be 90% efficient or better and its shared fans and power supplies conserve space and power.
The widgetry runs SMP Linux 2.6.26-36 and supports virtualization. Tilera’s iMesh technology enables it to integrate many cores with coherent caches to deliver scalable performance.
Figure a standard software stack, stuff like Apache, MySQL, Hadoop and MemcacheD supporting PHP, Python, Ruby, Perl and Java programming with tools like the Eclipse IDE and GNU GCC and C/C++ compilers.
Tilera says a tier one server OEM – and there are only a few of those – running MemcacheD on its own Tilera and Nehalem servers got 10% better performance out of its Tilera box. SPEC benchmarks aren’t any good at measuring the performance of these newfangled boxes so prototypes have apparently been running real loads in web centers for months.
Tilera, which has MIT antecedents, kicked off in late 2004 and has two processor generations in production. It closed a $25 million C round from Quanta, NTT and Broadcom in early March, all new backers, bringing total investment to $64 million. It claims 40 design-wins, soon to be 50, from a hundred paying customers. It’s not scheduled to be cash flow positive for another year. Revenues, it says, have been doubling every two years.